Method and apparatus for distributed processor dispersal logic
A method and system provides for efficient dispersal of instructions to be executed by a processor using a distributed methodology of a centralized scheduling structure. The method and system include mapping instructions received from at least two instruction groups during a first stage followed by...
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Main Authors | , , , |
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Format | Patent |
Language | English |
Published |
04.07.2002
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Edition | 7 |
Subjects | |
Online Access | Get full text |
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Summary: | A method and system provides for efficient dispersal of instructions to be executed by a processor using a distributed methodology of a centralized scheduling structure. The method and system include mapping instructions received from at least two instruction groups during a first stage followed by remapping, merging, and distributing instructions to a plurality of functional units during a second stage. The use of a first and second stage allowing an increased number of instructions to be executed by a processor operating at a given clock rate. |
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Bibliography: | Application Number: US20000749725 |