Process for the double-side polishing of semiconductor wafers and carrier for carrying out the process

• Main Authors: HEIER GERHARD, WENSKI GUIDO, ALTMANN THOMAS, WINKLER WOLFGANG
• Format: Patent
• Language: English
• Published: 06.12.2001
• Edition: 7
• Subjects: BASIC ELECTRIC ELEMENTS; DRESSING OR CONDITIONING OF ABRADING SURFACES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS; GRINDING; MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; PERFORMING OPERATIONS; POLISHING; SEMICONDUCTOR DEVICES; TRANSPORTING

A process for the double-side polishing of semiconductor wafers between two polishing plates which rotate in opposite directions and are covered with polishing cloth, so that at least 2 mum of semiconductor material is removed. The semiconductor wafers lay in plastic-lined cutouts in a set of a plurality of planar carriers which are made from steel and the mean thickness of which is 2 to 20 mum smaller than the mean thickness of the fully polished semiconductor wafers. The set comprises only those carriers whose difference in thickness is at most 5 mum, and each carrier belonging to the set has at least one unambiguous identification feature which assigns it to the set. An item of information contained in the identification feature is used in order for the plastic linings to be exchanged at fixed intervals and to ensure that the semiconductor wafers remain in the same order after the polishing as before the polishing. There is also a carrier which is suitable for carrying out the process.