Semiconductor device

• Main Authors: EMMERIK ARNOLDUS JOHANNES MARIA, ZINGG RENE PAUL, VAN ZWOL JOHANNES
• Format: Patent
• Language: English
• Published: 09.08.2001
• Edition: 7
• Subjects: BASIC ELECTRIC ELEMENTS; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; SEMICONDUCTOR DEVICES

The invention relates to a SOI deep depletion MOS transistor provided in a thin silicon layer (5) adjoining a surface (4) of a silicon body (3) and insulated from a silicon substrate (7) by a buried oxide layer (6). The channel region (13) of a first conductivity type is provided with at least one and preferably a plurality of zones (16) of the opposite conductivity type adjoining the surface to remove minority carriers from the interface between the channel and the gate oxide (15). The zones (16) extend across the whole thickness of the channel and adjoin the buried oxide at the side of the channel remote from the gate dielectric. Due to this construction, minority carriers are removed also from the rear side of the channel. This enables the transistor to be operative also at high voltages having values at which the substrate and the buried oxide operate as a second gate and as a second gate dielectric, respectively. The transistor may be used to advantage in high-voltage ICs comprising a low-voltage circuit part operated with a low supply voltage generated by the transistor.