PC-based instruction group permissions

A permissions model for a processor in which permissions are based on the instruction group of an instruction. These permissions may be stored in permissions tables and indexed using the program counter of the instruction. The permissions may identify which of a plurality of instruction groups of an...

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Bibliographic Details
Main Authors Semeria, Bernard J, Gonion, Jeffry E
Format Patent
LanguageEnglish
Published 03.09.2024
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Summary:A permissions model for a processor in which permissions are based on the instruction group of an instruction. These permissions may be stored in permissions tables and indexed using the program counter of the instruction. The permissions may identify which of a plurality of instruction groups of an instruction set architecture (ISA) of a processor are permitted to execute from that program counter value. Accordingly, the instruction group of the instruction can be compared to the permitted instruction groups to determine if the instruction has execution permission. In some cases, the instruction-group-based permissions are secondary execution privileges; additional primary execution permissions that are determined using the program counter may also be used.
Bibliography:Application Number: US202318343145