Semiconductor device containing stress relaxation layer and method of making thereof
A structure includes a first material layer, a second material layer, and a stress relaxation layer having a thickness of 0.5 nm or less between the first material layer and the second material layer.
Saved in:
Main Authors | , |
---|---|
Format | Patent |
Language | English |
Published |
27.08.2024
|
Subjects | |
Online Access | Get full text |
Cover
Loading…
Abstract | A structure includes a first material layer, a second material layer, and a stress relaxation layer having a thickness of 0.5 nm or less between the first material layer and the second material layer. |
---|---|
AbstractList | A structure includes a first material layer, a second material layer, and a stress relaxation layer having a thickness of 0.5 nm or less between the first material layer and the second material layer. |
Author | Chadda, Saket Chen, Zhen |
Author_xml | – fullname: Chen, Zhen – fullname: Chadda, Saket |
BookMark | eNqNyk0KwjAQhuEsdOHfHcYDCLYq7hXFfeu6DMnXNtjOlCSK3l4FD-DqhZdnakaigokpC_Teqri7TRrI4eEt6DMSe_HSUEwBMVJAx09OXoU6fiEQi6MeqVVHWlPPty9OLQK0nptxzV3E4teZWZ5P5fGywqAV4sAWglRdiyxf77f5Ljvkm3_MGyyBOzc |
ContentType | Patent |
DBID | EVB |
DatabaseName | esp@cenet |
DatabaseTitleList | |
Database_xml | – sequence: 1 dbid: EVB name: esp@cenet url: http://worldwide.espacenet.com/singleLineSearch?locale=en_EP sourceTypes: Open Access Repository |
DeliveryMethod | fulltext_linktorsrc |
Discipline | Medicine Chemistry Sciences |
ExternalDocumentID | US12074251B2 |
GroupedDBID | EVB |
ID | FETCH-epo_espacenet_US12074251B23 |
IEDL.DBID | EVB |
IngestDate | Fri Sep 06 06:14:19 EDT 2024 |
IsOpenAccess | true |
IsPeerReviewed | false |
IsScholarly | false |
Language | English |
LinkModel | DirectLink |
MergedId | FETCHMERGED-epo_espacenet_US12074251B23 |
Notes | Application Number: US202117240342 |
OpenAccessLink | https://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20240827&DB=EPODOC&CC=US&NR=12074251B2 |
ParticipantIDs | epo_espacenet_US12074251B2 |
PublicationCentury | 2000 |
PublicationDate | 20240827 |
PublicationDateYYYYMMDD | 2024-08-27 |
PublicationDate_xml | – month: 08 year: 2024 text: 20240827 day: 27 |
PublicationDecade | 2020 |
PublicationYear | 2024 |
RelatedCompanies | GLO AB SAMSUNG ELECTRONICS CO., LTD |
RelatedCompanies_xml | – name: SAMSUNG ELECTRONICS CO., LTD – name: GLO AB |
Score | 3.5581274 |
Snippet | A structure includes a first material layer, a second material layer, and a stress relaxation layer having a thickness of 0.5 nm or less between the first... |
SourceID | epo |
SourceType | Open Access Repository |
SubjectTerms | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES |
Title | Semiconductor device containing stress relaxation layer and method of making thereof |
URI | https://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20240827&DB=EPODOC&locale=&CC=US&NR=12074251B2 |
hasFullText | 1 |
inHoldings | 1 |
isFullTextHit | |
isPrint | |
link | http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwfV3dS8MwED_GFPVNp6LzgwjSt-Katos-FGHtyhDchu1kb6NpU1C0HVtF_3zvss75om8hgZAc_O4jud8dwHXnVkhEzR3GJpY0HVtaZmLz3BQqF6l0uh2pdLbFsDuYOA9Td9qA1zUXRtcJ_dTFERFRKeK90vp6vnnECnRu5fJGvuBUeR_GXmDU0THV6-LCCHpefzwKRr7h-94kMoZPnsUpCHStHqrrLXSjBaGh_9wjVsr8t0kJ92F7jLsV1QE0VNGCXX_dea0FO4_1hzcOa-wtDyGOKI-9LKhAa7lgmSKMM0o1XzV5YCvaByN2ype-AntL0KFmSZGxVaNoVubsXbefYuT3qTI_gquwH_sDE483-5HFbBJtbmIfQ7MoC3UCjOilrnCkkyG-0IuSmeRpZgu0S4pz6Z5C--992v8tnsEeyZWeUbk4h2a1-FAXaIcreakF-A0UJI4o |
link.rule.ids | 230,309,783,888,25576,76876 |
linkProvider | European Patent Office |
linkToHtml | http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwfV3dS8MwED_GFOebTsXNrwjSt-Katos-FGHtxtR94TrZ21jaFBRtx1bRP9-7bHO-6FtIICQHv_tI7ncHcFW7ERJRc4uxiSVNx5aWObV5YgqViEg69ZpUOtuiV2-PnIexOy7A65oLo-uEfuriiIioCPGea3092zxiBTq3cnEtX3Aqu2uFXmCsomOq18WFETS85qAf9H3D973R0Og9eRanINC1Gqiut9DFFoSG5nODWCmz3yaltQfbA9wtzfehoNIylPx157Uy7HRXH944XGFvcQDhkPLYs5QKtGZzFivCOKNU82WTB7akfTBip3zpK7C3KTrUbJrGbNkommUJe9ftpxj5fSpLDuGy1Qz9tonHm_zIYjIabm5iH0ExzVJ1DIzopa5wpBMjvtCLkrHkUWwLtEuKc-lWoPr3PtX_Fi-g1A67nUnnvvd4ArskY3pS5eIUivn8Q52hTc7luRbmN-rJkRs |
openUrl | ctx_ver=Z39.88-2004&ctx_enc=info%3Aofi%2Fenc%3AUTF-8&rfr_id=info%3Asid%2Fsummon.serialssolutions.com&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Apatent&rft.title=Semiconductor+device+containing+stress+relaxation+layer+and+method+of+making+thereof&rft.inventor=Chen%2C+Zhen&rft.inventor=Chadda%2C+Saket&rft.date=2024-08-27&rft.externalDBID=B2&rft.externalDocID=US12074251B2 |