Memory system and control method of memory system for shared memory based message routing module

A memory system includes a non-volatile memory including first and second chips, a processor configured to generate first messages in response to a command from an external device, the first messages addressed to the first and second chips, and a repeater including an input port to which the first m...

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Bibliographic Details
Main Author Tadokoro, Mitsunori
Format Patent
LanguageEnglish
Published 20.08.2024
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Summary:A memory system includes a non-volatile memory including first and second chips, a processor configured to generate first messages in response to a command from an external device, the first messages addressed to the first and second chips, and a repeater including an input port to which the first messages are input and first and second output ports connected to the first and second chips. The repeater is configured to write the first messages input via the input port to a shared memory, read the first message addressed to the first chip from the shared memory when the first chip is ready, and output the first message to the first chip through the first output port, and read the first message addressed to the second chip when the second chip is ready, and output the first message to the second chip through the second output port.
Bibliography:Application Number: US202217901837