DSI3 bus with enhanced robustness
Methods and devices provide for enhanced robustness via graceful packet error detection and packet retransmission. One illustrative sensing method includes: generating a voltage pulse on a signal conductor coupled to a sensor array including one or more active sensors, the voltage pulse representing...
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Main Authors | , |
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Format | Patent |
Language | English |
Published |
30.07.2024
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Subjects | |
Online Access | Get full text |
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Summary: | Methods and devices provide for enhanced robustness via graceful packet error detection and packet retransmission. One illustrative sensing method includes: generating a voltage pulse on a signal conductor coupled to a sensor array including one or more active sensors, the voltage pulse representing a broadcast read command (BRC) that defines a frame of one or more time-division-multiple-access (TDMA) slots, one slot for each active sensor to send a data packet; performing current sensing on the signal conductor to receive the data packet from each of the one or more active sensors; determining whether each said data packet is received error free; and requesting retransmission of each said data packet not received error free. |
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Bibliography: | Application Number: US202217585531 |