Isolation regions including two layers and method forming same

A method includes etching a semiconductor substrate to form trenches extending into the semiconductor substrate, and depositing a first dielectric layer into the trenches. The first dielectric layer fills lower portions of the trenches. A Ultra-Violet (UV) treatment is performed on the first dielect...

Full description

Saved in:
Bibliographic Details
Main Authors Tsai, Shin-Yeu, Wang, Kuan-Cheng, Hsiaw, Han-Ti, Hsu, Tsung Han
Format Patent
LanguageEnglish
Published 30.07.2024
Subjects
Online AccessGet full text

Cover

Loading…
More Information
Summary:A method includes etching a semiconductor substrate to form trenches extending into the semiconductor substrate, and depositing a first dielectric layer into the trenches. The first dielectric layer fills lower portions of the trenches. A Ultra-Violet (UV) treatment is performed on the first dielectric layer in an oxygen-containing process gas. The method further includes depositing a second dielectric layer into the trenches. The second dielectric layer fills upper portions of the trenches. A thermal treatment is performed on the second dielectric layer in an additional oxygen-containing process gas. After the thermal treatment, an anneal is performed on the first dielectric layer and the second dielectric layer.
Bibliography:Application Number: US202117340734