SRAM circuits with aligned gate electrodes

A device includes a Static Random Access Memory (SRAM) array, and an SRAM cell edge region abutting the SRAM array. The SRAM array and the SRAM cell edge region in combination include first gate electrodes having a uniform pitch. A word line driver abuts the SRAM cell edge region. The word line driv...

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Bibliographic Details
Main Authors Liaw, Jhon Jhy, Fu, Shih-Chi, Chen, Yen-Huei, Tsui, Ren-Fen, Liang, Min-Chang, Chen, Fang
Format Patent
LanguageEnglish
Published 16.07.2024
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
INFORMATION STORAGE
PHYSICS
SEMICONDUCTOR DEVICES
STATIC STORES
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Summary:A device includes a Static Random Access Memory (SRAM) array, and an SRAM cell edge region abutting the SRAM array. The SRAM array and the SRAM cell edge region in combination include first gate electrodes having a uniform pitch. A word line driver abuts the SRAM cell edge region. The word line driver includes second gate electrodes, and the first gate electrodes have lengthwise directions aligned to lengthwise directions of respective ones of the second gate electrodes.
Bibliography:Application Number: US202318182489