Multi-dielectric gate stack for crystalline thin film transistors

Embodiments disclosed herein include thin film transistors and methods of forming such thin film transistors. In an embodiment, the thin film transistor may comprise a substrate, a gate electrode over the substrate, and a gate dielectric stack over the gate electrode. In an embodiment, the gate diel...

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Main Authors Ma, Sean, Le, Van H, Kavalieros, Jack, Metz, Matthew V, Melitz, Wilhelm, Sharma, Abhishek A, Reshotko, Miriam, Dewey, Gilbert, Millard, Kent, Chu-Kung, Benjamin, Meric, Inanc, Shivaraman, Shriram
Format Patent
LanguageEnglish
Published 11.06.2024
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Summary:Embodiments disclosed herein include thin film transistors and methods of forming such thin film transistors. In an embodiment, the thin film transistor may comprise a substrate, a gate electrode over the substrate, and a gate dielectric stack over the gate electrode. In an embodiment, the gate dielectric stack may comprise a plurality of layers. In an embodiment, the plurality of layers may comprise an amorphous layer. In an embodiment, the thin film transistor may also comprise a semiconductor layer over the gate dielectric. In an embodiment, the semiconductor layer is a crystalline semiconductor layer. In an embodiment, the thin film transistor may also comprise a source electrode and a drain electrode.
Bibliography:Application Number: US201816001837