Semiconductor device and method for manufacturing the same

An IGBT region includes: an n-type carrier accumulation layer provided to be in contact with the n−-type drift layer on the first main surface side of the n−-type drift layer and having a higher n-type impurity concentration than the n−-type drift layer, a p-type base layer provided between the n-ty...

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Bibliographic Details
Main Authors Nitta, Tetsuya, Ikeda, Munenori, Harada, Kenji
Format Patent
LanguageEnglish
Published 11.06.2024
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Summary:An IGBT region includes: an n-type carrier accumulation layer provided to be in contact with the n−-type drift layer on the first main surface side of the n−-type drift layer and having a higher n-type impurity concentration than the n−-type drift layer, a p-type base layer provided between the n-type carrier accumulation layer and the first main surface, an n+-type emitter layer selectively provided in a surface layer portion of the p-type base layer, and a gate electrode provided to face the n+-type emitter layer and the p-type base layer with an interposition of an insulating film. A diode region includes a p-type anode layer provided between the n−-type drift layer and the first main surface and provided to a position deeper from the first main surface than a boundary between the n-type carrier accumulation layer and the n−-type drift layer.
Bibliography:Application Number: US202117454415