Bitline sense amplifier and a memory device with an equalizer

A bitline sense amplifier including: an amplifier which is connected between a first sensing bitline and a second sensing bitline, and detects and amplifies a voltage difference between a first bitline and a second bitline in response to a first control signal and a second control signal; and an equ...

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Bibliographic Details
Main Authors Ryu, Myeong Sik, Kim, Dong Geon, Baek, In Seok, Lim, Young-Il, Park, Sang Wook, Kim, Kyoung Min, Chang, Soo Bong, Lee, Seok Jae, Won, Bok-Yeon
Format Patent
LanguageEnglish
Published 16.04.2024
Subjects
INFORMATION STORAGE
PHYSICS
STATIC STORES
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Summary:A bitline sense amplifier including: an amplifier which is connected between a first sensing bitline and a second sensing bitline, and detects and amplifies a voltage difference between a first bitline and a second bitline in response to a first control signal and a second control signal; and an equalizer which is connected between a first supply line through which the first control signal is supplied and a second supply line through which the second control signal is supplied, and pre-charges the first bitline and the second bitline with a precharge voltage in response to an equalizing control signal, wherein the equalizer includes an equalizing enable transistor in which a source terminal is connected to the first supply line and performs equalizing in response to the equalizing control signal.
Bibliography:Application Number: US202217585865