Memory device and method for forming the same

A memory device includes a substrate, a first transistor and a second transistor, a first word line, a second word line, and a bit line. The first transistor and the second transistor are over the substrate and are electrically connected to each other, in which each of the first and second transisto...

Full description

Saved in:
Bibliographic Details
Main Authors Su, Hsin-Wen, Lin, Yu-Kuan, Hung, Lien-Jung, Wang, Ping-Wei, Lin, Shih-Hao
Format Patent
LanguageEnglish
Published 09.04.2024
Subjects
Online AccessGet full text

Cover

Loading…
More Information
Summary:A memory device includes a substrate, a first transistor and a second transistor, a first word line, a second word line, and a bit line. The first transistor and the second transistor are over the substrate and are electrically connected to each other, in which each of the first and second transistors includes first semiconductor layers and second semiconductor layers, a gate structure, and source/drain structures, in which the first semiconductor layers are in contact with the second semiconductor layers, and a width of the first semiconductor layers is narrower than a width of the second semiconductor layers. The first word line is electrically connected to the gate structure of the first transistor. The second word line is electrically connected to the gate structure of the second transistor. The bit line is electrically connected to a first one of the source/drain structures of the first transistor.
Bibliography:Application Number: US202217711448