Methods of forming stacked semiconductors die assemblies
Disclosed is a microelectronic device assembly comprising a substrate having conductors exposed on a surface thereof. Two or more microelectronic devices are stacked on the substrate and the components are connected with conductive material in preformed holes in dielectric material in the bond lines...
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Main Authors | , , , |
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Format | Patent |
Language | English |
Published |
02.04.2024
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Subjects | |
Online Access | Get full text |
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Summary: | Disclosed is a microelectronic device assembly comprising a substrate having conductors exposed on a surface thereof. Two or more microelectronic devices are stacked on the substrate and the components are connected with conductive material in preformed holes in dielectric material in the bond lines aligned with TSVs of the devices and the exposed conductors of the substrate. Methods of fabrication are also disclosed. |
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Bibliography: | Application Number: US202217932401 |