Fast open block erase in non-volatile memory structures

A method for performing an erase operation of a partially programmed memory block of a non-volatile memory structure. The method comprises: (1) applying an erase voltage bias level to a channel region of the memory block, (2) applying a word line voltage level to all programmed word line(s) of the m...

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Bibliographic Details
Main Authors Jia, Xiaojia, Guo, Jiacen
Format Patent
LanguageEnglish
Published 13.02.2024
Subjects
ELECTRICITY
INFORMATION STORAGE
PHYSICS
STATIC STORES
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Summary:A method for performing an erase operation of a partially programmed memory block of a non-volatile memory structure. The method comprises: (1) applying an erase voltage bias level to a channel region of the memory block, (2) applying a word line voltage level to all programmed word line(s) of the memory block, (3) applying a "float" condition to all unprogrammed word line(s) of the memory block, and (4) applying an erase verify operation to all word line(s) of the memory block, wherein the "float" condition comprises omitting application of the word line voltage to the unprogrammed word line(s).
Bibliography:Application Number: US202217732747