Gate formation on a quantum processor

In a general aspect, a gate is formed for a quantum processor. In some implementations, an arbitrary program is received. The arbitrary program includes a first sequence of quantum logic gates, which includes a parametric XY gate. A native gate set is identified, which includes a set of quantum logi...

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Bibliographic Details
Main Authors da Silva, Marcus Palmer, Ryan, Colm Andrew, Peterson, Eric Christopher, Scheer, Michael Justin Gerchick, Abrams, Deanna Margo
Format Patent
LanguageEnglish
Published 13.02.2024
Subjects
BASIC ELECTRONIC CIRCUITRY
CALCULATING
COMPUTER SYSTEMS BASED ON SPECIFIC COMPUTATIONAL MODELS
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
ELECTRICITY
PHYSICS
PULSE TECHNIQUE
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Summary:In a general aspect, a gate is formed for a quantum processor. In some implementations, an arbitrary program is received. The arbitrary program includes a first sequence of quantum logic gates, which includes a parametric XY gate. A native gate set is identified, which includes a set of quantum logic gates associated with a quantum processing unit. A second sequence of quantum logic gates corresponding to the parametric XY gate is identified, which includes a parametric quantum logic gate. Each of the quantum logic gates in the second sequence is selected from the native gate set. A native program is generated. The native program includes a third sequence of quantum logic gates. The third sequence of quantum logic gates corresponds to the first sequence of quantum logic gates and includes the second sequence of quantum logic gates. The native program is provided for execution by the quantum processing unit.
Bibliography:Application Number: US202318155909