Leadframe package using selectively pre-plated leadframe

The present disclosure is directed to a leadframe package with a surface mounted semiconductor die coupled to leads of the leadframe package through wire bonding. The leads are partially exposed outside the package and configured to couple to another structure, like a printed circuit board (PCB). Th...

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Bibliographic Details
Main Author Crema, Paolo
Format Patent
LanguageEnglish
Published 09.01.2024
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Summary:The present disclosure is directed to a leadframe package with a surface mounted semiconductor die coupled to leads of the leadframe package through wire bonding. The leads are partially exposed outside the package and configured to couple to another structure, like a printed circuit board (PCB). The exposed portions, namely outer segments, of the leads include a plating or coating layer of a material that enhances the solder wettability of the leads to the PCB through solder bonding. The enclosed portions, namely inner segments, of the leads do not include the plating layer of the outer segment and, thus, include a different surface material or surface finish.
Bibliography:Application Number: US202016990645