Processor-guided execution of offloaded instructions using fixed function operations

Processor-guided execution of offloaded instructions using fixed function operations is disclosed. Instructions designated for remote execution by a target device are received by a processor. Each instruction includes, as an operand, a target register in the target device. The target register may be...

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Bibliographic Details
Main Authors Walker, William L, Evers, Marius, Kalamatianos, John, Moyer, Paul, Clark, Michael T, Fleischman, Jay, Kotra, Jagadish B
Format Patent
LanguageEnglish
Published 09.01.2024
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Summary:Processor-guided execution of offloaded instructions using fixed function operations is disclosed. Instructions designated for remote execution by a target device are received by a processor. Each instruction includes, as an operand, a target register in the target device. The target register may be an architected virtual register. For each of the plurality of instructions, the processor transmits an offload request in the order that the instructions are received. The offload request includes the instruction designated for remote execution. The target device may be, for example, a processing-in-memory device or an accelerator coupled to a memory.
Bibliography:Application Number: US202017123270