Polarization controlled transistor

A transistor includes a first layer comprising a group III-nitride semiconductor. A second layer comprising a group III-nitride semiconductor is disposed over the first layer. A third layer comprising a group III-nitride semiconductor is disposed over the second layer. An interface between the secon...

Full description

Saved in:
Bibliographic Details
Main Authors Johnson, Noble M, Wunderer, Thomas, Lu, Jengping
Format Patent
LanguageEnglish
Published 19.12.2023
Subjects
Online AccessGet full text

Cover

Loading…
More Information
Summary:A transistor includes a first layer comprising a group III-nitride semiconductor. A second layer comprising a group III-nitride semiconductor is disposed over the first layer. A third layer comprising a group III-nitride semiconductor is disposed over the second layer. An interface between the second layer and the third layer form a polarization heterojunction. A fourth layer comprising a group III-nitride semiconductor is disposed over the third layer. An interface between the third layer and the fourth layer forms a pn junction. A first electrical contact pad is disposed on the fourth layer. A second electrical contact pad is disposed on the third layer. A third electrical contact pad is electronically coupled to bias the polarization heterojunction.
Bibliography:Application Number: US202016920249