Pic structure having barrier surrounding opening for optical element to prevent stress damage

A photonic integrated circuit (PIC) structure includes an active region in at least an active layer over a substrate, the active region including a plurality of transistors therein. A plurality of dielectric interconnect layers are over the active region, and an opening is defined through the plural...

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Bibliographic Details
Main Authors Polomoff, Nicholas A, Das, Pallabi, Ramachandran, Koushik, Cho, Jae Kyu, Rabie, Mohamed, Jiang, Yunyao
Format Patent
LanguageEnglish
Published 31.10.2023
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
OPTICAL ELEMENTS, SYSTEMS, OR APPARATUS
OPTICS
PHYSICS
SEMICONDUCTOR DEVICES
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Summary:A photonic integrated circuit (PIC) structure includes an active region in at least an active layer over a substrate, the active region including a plurality of transistors therein. A plurality of dielectric interconnect layers are over the active region, and an opening is defined through the plurality of dielectric interconnect layers. The opening extends to at least the active layer. A barrier is within the plurality of dielectric interconnect layers and surrounding the opening. An optical element is positioned in the opening. The barrier prevents stress damage, such as cracks and/or delaminations, from propagating from or to the opening, and maintains the hermetic seal of the PIC structure.
Bibliography:Application Number: US202117389759