Semiconductor package structure and method for forming the same

• Main Authors: Tseng, Huang-Wen, Chen, Yang-Che, Lin, Chen-Hua, Liang, Victor Chiang, Liu, Chwen-Ming
• Format: Patent
• Language: English
• Published: 31.10.2023
• Subjects: BASIC ELECTRIC ELEMENTS; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; SEMICONDUCTOR DEVICES

A semiconductor package structure and method of manufacturing a semiconductor package structure are provided. The semiconductor package structure includes a connection layer formed on a metal base layer, at least one die unit formed on the connection layer, a metal pillar connecting the metal base layer and surrounding the die unit, and an interconnect structure overlaid onto the die unit and the metal pillar. Each die unit comprises at least one die attached onto the connection layer and surrounded by a molding structure. The interconnect structure includes a first interconnect layer overlaid onto the die unit and the metal pillar and a second interconnect layer formed on the first interconnect layer. The first and second interconnect layers comprise first and second metal layers being parallel with the top surface of the die unit. A projection of the metal layers overlaps an upper surface of the die.