Hybrid analog-digital matrix processors
Techniques for computing matrix operations for arbitrarily large matrices on a finite-sized hybrid analog-digital matrix processor are described. Techniques for gain adjustment in a finite-sized hybrid analog-digital matrix processor are described which enable the system to obtain higher energy effi...
Saved in:
Main Authors | , , , |
---|---|
Format | Patent |
Language | English |
Published |
03.10.2023
|
Subjects | |
Online Access | Get full text |
Cover
Loading…
Summary: | Techniques for computing matrix operations for arbitrarily large matrices on a finite-sized hybrid analog-digital matrix processor are described. Techniques for gain adjustment in a finite-sized hybrid analog-digital matrix processor are described which enable the system to obtain higher energy efficiencies, greater physical density and improved numerical accuracy. In some embodiments, these techniques enable maximization of the predictive accuracy of a GEMM-based convolutional neural network using low-precision data representations. |
---|---|
Bibliography: | Application Number: US202117246892 |