Semiconductor package with guide pin

A semiconductor guide pin is disclosed. Specific implementations may include a heatsink, one or more substrates coupled together, one or more pressfit pins coupled to the one or more substrates, and two or more guide pins coupled to the one or more substrates, where the two or more guide pins may ha...

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Bibliographic Details
Main Authors Chew, Chee Hiong, Prajuckamol, Atapol, Niu, Chuncao, Yao, Yushuang
Format Patent
LanguageEnglish
Published 25.07.2023
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Summary:A semiconductor guide pin is disclosed. Specific implementations may include a heatsink, one or more substrates coupled together, one or more pressfit pins coupled to the one or more substrates, and two or more guide pins coupled to the one or more substrates, where the two or more guide pins may have a height greater than the one or more pressfit pins.
Bibliography:Application Number: US201916502441