NAND flash array defect real time detection
A memory device comprises a memory array; a word line driver circuit including a charge pump circuit configured to generate a program voltage target to be applied to a word line to program a memory cell of the memory array, and a control loop to activate the charge pump circuit using a control signa...
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Main Authors | , , , |
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Format | Patent |
Language | English |
Published |
25.07.2023
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Subjects | |
Online Access | Get full text |
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