Stacked integrated circuit devices

• Main Authors: Do, Jung Ho, Lee, Seungyoung
• Format: Patent
• Language: English
• Published: 11.07.2023
• Subjects: BASIC ELECTRIC ELEMENTS; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; SEMICONDUCTOR DEVICES

Stacked integrated circuit devices may include standard cells including a first standard cell in a first row and a second standard cell in a second row immediately adjacent to the first row. Each of the standard cells may include an upper transistor and a lower transistor. The upper transistor may include an upper active region, an upper gate structure, and an upper source/drain region. The lower transistor may include a lower active region, a lower gate structure, and a lower source/drain region. Each of the standard cells may also include a power line and a power via electrically connecting the power line to the lower source/drain region. The power via of the first standard cell and the power via of the second standard cell may be aligned with each other along the first direction.