Integrated assemblies, and methods of forming integrated assemblies

Some embodiments include an integrated structure having a stack of memory cell levels. A pair of channel-material-pillars extend through the stack. A source structure is under the stack. The source structure includes a portion having an upper region, a lower region, and an intermediate region betwee...

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Bibliographic Details
Main Authors Haller, Gordon A, Howder, Collin
Format Patent
LanguageEnglish
Published 27.06.2023
Subjects
ELECTRICITY
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Summary:Some embodiments include an integrated structure having a stack of memory cell levels. A pair of channel-material-pillars extend through the stack. A source structure is under the stack. The source structure includes a portion having an upper region, a lower region, and an intermediate region between the upper and lower regions. The upper and lower regions have a same composition and join to one another at edge locations. The intermediate region has a different composition than the upper and lower regions. The edge locations are directly against the channel material of the channel-material-pillars. Some embodiments include methods of forming an integrated assembly.
Bibliography:Application Number: US202217731103