Semiconductor transistors on multi-layered substrates
A semiconductor device is provided, which includes a multi-layered substrate, a first doped region, a second doped region, and a gate structure. The multi-layered substrate has a device layer over an isolation layer and the device layer includes a first region having a first substrate thickness and...
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Main Author | |
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Format | Patent |
Language | English |
Published |
23.05.2023
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Subjects | |
Online Access | Get full text |
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Summary: | A semiconductor device is provided, which includes a multi-layered substrate, a first doped region, a second doped region, and a gate structure. The multi-layered substrate has a device layer over an isolation layer and the device layer includes a first region having a first substrate thickness and a second region having a second substrate thickness that is lesser than the first substrate thickness. The first doped region is in the first region and the second doped region is in the second region. The gate structure is between the first and second doped regions. |
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Bibliography: | Application Number: US202017062625 |