Methods and apparatus for smoothing dynamic random access memory bit line metal

A process of smoothing a top surface of a bit line metal of a memory structure to decrease resistance of a bit line stack. The process includes depositing titanium layer of approximately 30 angstroms to 50 angstroms on polysilicon layer on a substrate, depositing first titanium nitride layer of appr...

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Bibliographic Details
Main Authors Hwang, In Seok, Panda, Priyadarshi
Format Patent
LanguageEnglish
Published 18.04.2023
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Summary:A process of smoothing a top surface of a bit line metal of a memory structure to decrease resistance of a bit line stack. The process includes depositing titanium layer of approximately 30 angstroms to 50 angstroms on polysilicon layer on a substrate, depositing first titanium nitride layer of approximately 15 angstroms to approximately 40 angstroms on titanium layer, annealing substrate at a temperature of approximately 700 degrees Celsius to approximately 850 degrees Celsius, depositing second titanium nitride layer of approximately 15 angstroms to approximately 40 angstroms on first titanium nitride layer after annealing, depositing a bit line metal layer of ruthenium on second titanium nitride layer, annealing bit line metal layer at temperature of approximately 550 degrees Celsius to approximately 650 degrees Celsius, and soaking bit line metal layer in hydrogen-based ambient for approximately 3 minutes to approximately 6 minutes during annealing.
Bibliography:Application Number: US202017096099