Optimization of semiconductor cell of vertical field effect transistor (VFET)

• Main Author: Do, Jung Ho
• Format: Patent
• Language: English
• Published: 14.02.2023
• Subjects: BASIC ELECTRIC ELEMENTS; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; SEMICONDUCTOR DEVICES

A vertical field effect transistor (VFET) cell implementing a VFET circuit over a plurality of gate grids includes: a 1st circuit including at least one VFET and provided over at least one gate grid; and a 2nd circuit including at least one VFET and provided over at least one gate grid formed on a left or right side of the 1st circuit, wherein a gate of the VFET of the 1st circuit is configured to share a gate signal or a source/drain signal of the VFET of the 2nd circuit, and the 1st circuit is an (X−1)-contacted poly pitch (CPP) circuit, which is (X−1) CPP wide, converted from an X-CPP circuit which is X CPP wide and performs a same logic function as the (X−1)-CPP circuit, X being an integer greater than 1.