Memory devices and methods which may facilitate tensor memory access with memory maps based on memory operations

Examples described herein include systems and methods which include an apparatus comprising a memory array including a plurality of memory cells and a memory controller coupled to the memory array. The memory controller comprises a memory mapper configured to configure a memory map on the basis of a...

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Bibliographic Details
Main Authors Cummins, Jaime, Schmitz, Tamara, Luo, Fa-Long, Chritz, Jeremy
Format Patent
LanguageEnglish
Published 07.02.2023
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Summary:Examples described herein include systems and methods which include an apparatus comprising a memory array including a plurality of memory cells and a memory controller coupled to the memory array. The memory controller comprises a memory mapper configured to configure a memory map on the basis of a memory command associated with a memory access operation. The memory map comprises a specific sequence of memory access instructions to access at least one memory cell of the memory array. For example, the specific sequence of memory access instructions for a diagonal memory command comprises a sequence of memory access instructions that each access a memory cell along a diagonal of the memory array.
Bibliography:Application Number: US202016864437