Electrical power operating states for core logic in a memory physical layer

An electronic device has a memory functional block that includes memory circuits and a memory physical layer (PHY) functional block with core logic that controls operations in the memory functional block, a memory PHY voltage regulator, a system voltage regulator, and a controller. The electronic de...

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Bibliographic Details
Main Authors Gada, Sridhar Varadharajulu, He, Xiaojie, Arora, Sonu
Format Patent
LanguageEnglish
Published 31.01.2023
Subjects
CALCULATING
COMPUTING
CONTROLLING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
REGULATING
SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
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Summary:An electronic device has a memory functional block that includes memory circuits and a memory physical layer (PHY) functional block with core logic that controls operations in the memory functional block, a memory PHY voltage regulator, a system voltage regulator, and a controller. The electronic device also includes a switch having an input coupled to an output of the memory PHY voltage regulator, another input coupled to an output of the system voltage regulator, and an output coupled to a power supply input of the core logic. The controller sets the switch so that electrical power is provided from the memory PHY voltage regulator to the core logic in a full power operating state. The controller sets the switch so that electrical power is provided from the system voltage regulator to the core logic in one or more low power operating states.
Bibliography:Application Number: US201916729805