Apparatuses and methods to control memory operations on buffers

The present disclosure relates to apparatuses and methods to control memory operations on buffers. An example apparatus includes a memory device and a host. The memory device includes a buffer and an array of memory cells, and the buffer includes a plurality of caches. The host includes a system con...

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Bibliographic Details
Main Authors Mohammadzadeh, Ali, Srinivasan, Dheeraj, Hoei, Jung Sheng, Grunzke, Terry M
Format Patent
LanguageEnglish
Published 17.01.2023
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Summary:The present disclosure relates to apparatuses and methods to control memory operations on buffers. An example apparatus includes a memory device and a host. The memory device includes a buffer and an array of memory cells, and the buffer includes a plurality of caches. The host includes a system controller, and the system controller is configured to control performance of a memory operation on data in the buffer. The memory operation is associated with data movement among the plurality of caches.
Bibliography:Application Number: US202117187066