Memory structure and manufacturing method thereof

• Main Authors: Ou Yang, Tzu-Ming, Li, Shu-Ming, Lin, Keng-Ping
• Format: Patent
• Language: English
• Published: 13.12.2022
• Subjects: ELECTRICITY

A memory structure including a substrate, a bit line structure, a contact structure, a stop layer, and a capacitor structure is provided. The substrate includes a memory array region. The bit line structure is located in the memory array region and located on the substrate. The contact structure is located in the memory array region and located on the substrate on one side of the bit line structure. The stop layer is located in the memory array region and located above the bit line structure. The capacitor structure is located in the memory array region. The capacitor structure passes through the stop layer and is electrically connected to the contact structure. A bottom surface of the capacitor structure is lower than a bottom surface of the stop layer.