Two way single VREF trim for fully differential CDAC for accurate temperature sensing

A temperature sensing circuit of a data storage system includes a temperature sensor, a digital-to-analog circuit, and a reference generation and trimming circuit configured to generate a common mode voltage (VCM), a positive reference voltage (VREFP), and a negative reference voltage (VREFN) using...

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Bibliographic Details
Main Authors Kumar, Nittala Venkata Satya Somanadh, Yadala, Sridhar, Lakshminarayana, Addagalla Aswani Krishna, Choudhary, Anupam G N
Format Patent
LanguageEnglish
Published 29.11.2022
Subjects
INFORMATION STORAGE
PHYSICS
STATIC STORES
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Summary:A temperature sensing circuit of a data storage system includes a temperature sensor, a digital-to-analog circuit, and a reference generation and trimming circuit configured to generate a common mode voltage (VCM), a positive reference voltage (VREFP), and a negative reference voltage (VREFN) using a single band gap reference signal. The trimming circuit is configured to trim the VCM, VREFP, and VREFN by adjusting a VC trim signal to increase the VCM until a VCM error is below a threshold; adjusting a high temperature trim signal to increase the VREFP and decrease the VREFN until a digital temperature signal associated with the digital-to-analog circuit attains a predetermined accuracy level for a first temperature; and adjusting a low temperature trim signal to increase the VREFP, VCM, and VREFN until the digital temperature signal attains a predetermined accuracy level for a second temperature.
Bibliography:Application Number: US202117349963