Self-aligned supervia and metal direct etching process to manufacture self-aligned supervia

A semiconductor device structure includes: at least one inter-metal layer stacked in a vertical direction; and a 1st via structure penetrating the at least one inter-metal layer, wherein, in the at least one inter-metal layer, a 1st vertical side of the 1st via structure does not contact a barrier m...

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Bibliographic Details
Main Authors Lee, Euibok, Bae, Taeyong, Seo, Hoonseok
Format Patent
LanguageEnglish
Published 01.11.2022
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Summary:A semiconductor device structure includes: at least one inter-metal layer stacked in a vertical direction; and a 1st via structure penetrating the at least one inter-metal layer, wherein, in the at least one inter-metal layer, a 1st vertical side of the 1st via structure does not contact a barrier metal pattern while a 2nd vertical side of the 1st via structure opposite to the 1st vertical side of the 1st via structure contacts the barrier metal pattern.
Bibliography:Application Number: US202117150557