Semiconductor device
The polysilicon resistance has a large resistance variation rate after the end of the mold packaging process. In order to enable high-precision trimming, it is desired to realize a resistance which is hardly affected by stress and temperature fluctuation generated in a substrate by a mold packaging...
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Main Authors | , , |
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Format | Patent |
Language | English |
Published |
19.07.2022
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Subjects | |
Online Access | Get full text |
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Summary: | The polysilicon resistance has a large resistance variation rate after the end of the mold packaging process. In order to enable high-precision trimming, it is desired to realize a resistance which is hardly affected by stress and temperature fluctuation generated in a substrate by a mold packaging process. A resistance element is formed in a plurality of wiring layers, and has a first conductive layer formed in a first wiring layer, a second conductive layer formed in a second wiring layer, and a repeating pattern of an interlayer conductive layer connecting the first conductive layer and the second conductive layer, and the interlayer conductive layer is formed of a plurality of types of materials. |
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Bibliography: | Application Number: US201916534592 |