Method for forming spacers of a transistor

A method for forming spacers on a gate pattern includes deposition of a first dielectric layer having basal portions on an active layer and side portions of the edges of the pattern; anisotropic modification of only the basal portions of the first layer, so as to obtain modified basal portions; depo...

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Bibliographic Details
Main Authors Chaker, Ahmad, Vallee, Christophe, Bonvalot, Marceline, Posseme, Nicolas
Format Patent
LanguageEnglish
Published 19.07.2022
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Summary:A method for forming spacers on a gate pattern includes deposition of a first dielectric layer having basal portions on an active layer and side portions of the edges of the pattern; anisotropic modification of only the basal portions of the first layer, so as to obtain modified basal portions; deposition of a second dielectric layer on the first layer, also having basal and side portions; anisotropic etching of only the basal portions of the second layer, so as to remove these basal portions while conserving the side portions; and removal of the modified basal portions while conserving the first and second non-modified side portions, by selective etching of the modified dielectric material vis-à-vis the non-modified dielectric material.
Bibliography:Application Number: US202016926148