Array substrate, display panel and display device
An array substrate includes a base substrate; a data line and a common electrode line on the base substrate; and a first gate line and a second gate line on the base substrate, wherein both the first gate line and the second gate line cross both the data line and the common electrode line to define...
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Main Authors | , , , , , , |
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Format | Patent |
Language | English |
Published |
19.07.2022
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Subjects | |
Online Access | Get full text |
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Summary: | An array substrate includes a base substrate; a data line and a common electrode line on the base substrate; and a first gate line and a second gate line on the base substrate, wherein both the first gate line and the second gate line cross both the data line and the common electrode line to define a sub-pixel. The sub-pixel includes: a pixel electrode; a common electrode; and an insulating layer between the pixel electrode and the common electrode. The common electrode includes a plurality of slits, and the slits extend in the same direction as the data line. The slits include a first slit close to the data line, the pixel electrode includes a first side surface close to the data line, and an orthographic projection of the first side surface on the base substrate is located within an orthographic projection of the first slit on the base substrate. |
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Bibliography: | Application Number: US201916629313 |