Indicating latency associated with a memory request in a system
Methods, systems, and devices for a latency indication in a memory system or sub-system are described. An interface controller of a memory system may transmit an indication of a time delay (e.g., a wait signal) to a host in response to receiving an access command from the host. The interface control...
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Main Authors | , , |
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Format | Patent |
Language | English |
Published |
07.06.2022
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Subjects | |
Online Access | Get full text |
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