Per thread side channel attack protection

The present disclosure is directed to systems and methods of selectively implementing SCA mitigation elements on a per-thread basis to mitigate the effects of side channel attacks. Processor core circuits initiate a plurality of processor threads. Each of a plurality of SCA mitigation features inclu...

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Bibliographic Details
Main Authors de Medeiros Kawakami, Henrique, Sun, Ke, Branco, Rodrigo, Hu, Kekai
Format Patent
LanguageEnglish
Published 26.04.2022
Subjects
BASIC ELECTRIC ELEMENTS
CABLES
CALCULATING
COMPUTING
CONDUCTORS
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
ELECTRICITY
INSULATORS
PHYSICS
SELECTION OF MATERIALS FOR THEIR CONDUCTIVE, INSULATING ORDIELECTRIC PROPERTIES
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Summary:The present disclosure is directed to systems and methods of selectively implementing SCA mitigation elements on a per-thread basis to mitigate the effects of side channel attacks. Processor core circuits initiate a plurality of processor threads. Each of a plurality of SCA mitigation features include one or more SCA mitigation elements. SCA mitigation control circuitry associates a register circuit with each respective one of the plurality of processor threads initiated by the processor core circuits. The SCA mitigation control circuitry selectively ENABLES/DISABLES one or more SCA mitigation elements for each of the plurality of processor threads. The ENABLEMENT/DISABLEMENT of each of the SCA mitigation elements may be autonomously adjusted by the SCA mitigation control circuitry and/or manually adjusted via one or more user inputs provided to the SCA mitigation control circuitry.
Bibliography:Application Number: US201916584373