Semiconductor structure for MEMS device

The present disclosure relates to a method of forming an integrated chip structure. The method includes forming a plurality of interconnect layers within a dielectric structure over a substrate. A dielectric layer arranged along a top of the dielectric structure is patterned to define a via hole exp...

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Bibliographic Details
Main Authors Peng, Jung-Huei, Liu, Yu-Chia, Cheng, Chun-Wen, Chu, Chia-Hua
Format Patent
LanguageEnglish
Published 26.04.2022
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
MICROSTRUCTURAL TECHNOLOGY
PERFORMING OPERATIONS
PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTUREOR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
SEMICONDUCTOR DEVICES
TRANSPORTING
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Summary:The present disclosure relates to a method of forming an integrated chip structure. The method includes forming a plurality of interconnect layers within a dielectric structure over a substrate. A dielectric layer arranged along a top of the dielectric structure is patterned to define a via hole exposing an uppermost one of the plurality of interconnect layers. An extension via is formed within the via hole and one or more conductive materials are formed over the dielectric layer and the extension via. The one or more conductive materials are patterned to define a sensing electrode over and electrically coupled to the extension via. A microelectromechanical systems (MEMS) substrate is bonded to the substrate. The MEMs substrate is vertically separated from the sensing electrode.
Bibliography:Application Number: US202016944399