Systems and methods to facilitate resolution and bandwidth of supply voltage

A arrangement is disclosed for an on-chip system having an increased resolution for supply voltage measurements. The system includes a phase locked loop (PLL), a divider, and a timer. The PLL is configured to generate an oscillator signal. The divider is configured to divide the oscillator signal to...

Full description

Saved in:
Bibliographic Details
Main Author Musunuri, Surya Kiran
Format Patent
LanguageEnglish
Published 08.03.2022
Subjects
AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATIONOF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
BASIC ELECTRONIC CIRCUITRY
CODE CONVERSION IN GENERAL
CODING
DECODING
ELECTRICITY
MEASURING
MEASURING ELECTRIC VARIABLES
MEASURING MAGNETIC VARIABLES
PHYSICS
TESTING
Online AccessGet full text

Cover

More Information
Summary:A arrangement is disclosed for an on-chip system having an increased resolution for supply voltage measurements. The system includes a phase locked loop (PLL), a divider, and a timer. The PLL is configured to generate an oscillator signal. The divider is configured to divide the oscillator signal to generate an divided clock signal. The timer is configured to generate an application start signal and an analog to digital converter (ADC) start signal based on the oscillator signal and a timer delay (Tdelay). The timer delay (Tdelay) is based on the application start signal and the ADC start signal.
Bibliography:Application Number: US201916375109