Physically unclonable camouflage structure and methods for fabricating same

An application specific integrated circuit (ASIC) and a method for its design and fabrication is disclosed. In one embodiment, the camouflaged application specific integrated circuit (ASIC), comprises a plurality of interconnected functional logic cells that together perform one or more ASIC logical...

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Bibliographic Details
Main Authors Chow, Lap Wai, Wang, Bryan J, Cocchi, Ronald P, Baukus, James P
Format Patent
LanguageEnglish
Published 01.03.2022
Subjects
BASIC ELECTRIC ELEMENTS
BASIC ELECTRONIC CIRCUITRY
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
PHYSICS
PULSE TECHNIQUE
SEMICONDUCTOR DEVICES
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Summary:An application specific integrated circuit (ASIC) and a method for its design and fabrication is disclosed. In one embodiment, the camouflaged application specific integrated circuit (ASIC), comprises a plurality of interconnected functional logic cells that together perform one or more ASIC logical functions, wherein the functional logic cells comprise a camouflage cell including: a source region of a first conductivity type, a drain region of the first conductivity type, and a camouflage region of a second conductivity type disposed between the source region and the drain region. The camouflage region renders the camouflage cell always off in a first camouflage cell configuration and always on in a second camouflage cell configuration having a planar layout substantially indistinguishable from the first configuration.
Bibliography:Application Number: US202016775077