System and method to enhance reliability in connection with arrangements including circuits

A reliability cover that is disposed over at least one of an integrated circuit package and a Si die of the integrated circuit package is disclosed. The integrated circuit package is mountable to a printed circuit board via a plurality of solder balls. The reliability cover is configured to reduce a...

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Bibliographic Details
Main Authors Lau, Chun Sean, Gill, Paramjeet Singh, Teh, Weng-Hong, Yu, Lee Kong, Chin, Yoong Tatt, Im, Sungjun
Format Patent
LanguageEnglish
Published 01.03.2022
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Summary:A reliability cover that is disposed over at least one of an integrated circuit package and a Si die of the integrated circuit package is disclosed. The integrated circuit package is mountable to a printed circuit board via a plurality of solder balls. The reliability cover is configured to reduce a difference in a coefficient of thermal expansion between the integrated circuit package and the printed circuit board, and between the Si die and a substrate of the integrated circuit package by a threshold value.
Bibliography:Application Number: US202016821926