Gate driver circuit for reducing deadtime inefficiencies

• Main Author: Shankar, Krishnamurthy Ganapathi
• Format: Patent
• Language: English
• Published: 12.10.2021
• Subjects: APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC,OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWERSUPPLY SYSTEMS; BASIC ELECTRONIC CIRCUITRY; CONTROL OR REGULATION OF ELECTRIC MOTORS, ELECTRIC GENERATORSOR DYNAMO-ELECTRIC CONVERTERS; CONTROL OR REGULATION THEREOF; CONTROLLING; CONTROLLING TRANSFORMERS, REACTORS OR CHOKE COILS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUTPOWER; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER; ELECTRICITY; EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS; GENERATION; PHYSICS; PULSE TECHNIQUE; REGULATING; SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES

A driver circuit comprises a first buffer receiving a control signal, and a first transistor coupled to first buffer and an output. A second transistor is coupled to a first current mirror and the output. A third transistor is coupled to the output and an inverter. A fourth transistor receives the inverter's output at its control input and is coupled to the output. A fifth transistor is coupled to third transistor. The second, third, and fifth transistors receive supply voltage at their respective control inputs. A sixth transistor receives the control signal's inverse at its control input and is coupled to fifth transistor and a second current mirror. A current source is coupled to second current mirror and a second buffer. A seventh transistor receives the second buffer's output at its control input and is coupled to first buffer. An eighth transistor is coupled to first buffer and seventh transistor.