Universal process kit

The implementations described herein generally relate to a process kit suitable for use in a semiconductor process chamber, which reduces edge effects and widens the processing window with a single edge ring as compared to conventional process kits. The process kit generally includes an edge ring di...

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Bibliographic Details
Main Authors Rogers, James, Joubert, Olivier, Kenney, Jason A, Achutharaman, Vedapuram S, Luere, Olivier, Srinivasan, Sunil, Dhindsa, Rajinder
Format Patent
LanguageEnglish
Published 29.06.2021
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Summary:The implementations described herein generally relate to a process kit suitable for use in a semiconductor process chamber, which reduces edge effects and widens the processing window with a single edge ring as compared to conventional process kits. The process kit generally includes an edge ring disposed adjacent to and surrounding a perimeter of a semiconductor substrate in a plasma chamber. A dimension of a gap between the substrate and the edge ring is less than about 1000 μm, and a height difference between the substrate and the edge ring is less than about (+/−) 300 μm. The resistivity of the ring is less than about 50 Ohm-cm.
Bibliography:Application Number: US201715436936