Monolithic silicon bridge stack including a hybrid baseband die supporting processors and memory
A semiconductive device stack, includes a baseband processor die with an active surface and a backside surface, and a recess in the backside surface. A recess-seated device is disposed in the recess, and a through-silicon via in the baseband processor die couples the baseband processor die at the ac...
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Main Authors | , , , , , , , |
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Format | Patent |
Language | English |
Published |
25.05.2021
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Subjects | |
Online Access | Get full text |
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Summary: | A semiconductive device stack, includes a baseband processor die with an active surface and a backside surface, and a recess in the backside surface. A recess-seated device is disposed in the recess, and a through-silicon via in the baseband processor die couples the baseband processor die at the active surface to the recess-seated die at the recess. A processor die is disposed on the baseband processor die backside surface, and a memory die is disposed on the processor die. The several dice are coupled by through-silicon via groups. |
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Bibliography: | Application Number: US201916515979 |