Semiconductor device having a vertical channel layer with an impurity region surrounding a dielectric core

A semiconductor device includes a core insulating layer extending in a first direction, an etch stop layer disposed on the core insulating layer, a channel layer extending along a sidewall of the core insulating layer and a sidewall of the etch stop layer, conductive patterns each surrounding the ch...

Full description

Saved in:
Bibliographic Details
Main Authors Park, In Su, Lee, Ki Hong, Kim, Do Yeon
Format Patent
LanguageEnglish
Published 27.04.2021
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
Online AccessGet full text

Cover

More Information
Summary:A semiconductor device includes a core insulating layer extending in a first direction, an etch stop layer disposed on the core insulating layer, a channel layer extending along a sidewall of the core insulating layer and a sidewall of the etch stop layer, conductive patterns each surrounding the channel layer and stacked to be spaced apart from each other in the first direction, and an impurity region formed in an upper end of the channel layer.
Bibliography:Application Number: US201916360447