Memory sub-system self-testing operations

A method includes requesting, by a component of a memory sub-system controller, control of a data path associated with a memory device coupleable to the controller. The method can include generating, by the component, data corresponding to an operation to test the memory device and causing, by the c...

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Bibliographic Details
Main Authors Benjamin, Keith A, Eckel, Nathan A
Format Patent
LanguageEnglish
Published 20.04.2021
Subjects
INFORMATION STORAGE
PHYSICS
STATIC STORES
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Summary:A method includes requesting, by a component of a memory sub-system controller, control of a data path associated with a memory device coupleable to the controller. The method can include generating, by the component, data corresponding to an operation to test the memory device and causing, by the component, the data to be injected to the data path such that the data is written to the memory device. The method can further include reading, by the component, the data written to the memory device and determining, by the component, whether the data read by the component from the memory device matches the data written to the memory device.
Bibliography:Application Number: US201916713108