Systems and methods for precision fabrication of an orifice within an integrated circuit

A method for fabricating an orifice in a semiconductor which can include: removing a first depth of the semiconductor using a first material removal technique and removing a second depth of the semiconductor using a second material removal technique. The method can optionally include: adding a sacri...

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Bibliographic Details
Main Author Fricker, Jean-Philippe
Format Patent
LanguageEnglish
Published 06.04.2021
Subjects
BASIC ELECTRIC ELEMENTS
CLADDING OR PLATING BY SOLDERING OR WELDING
CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
MACHINE TOOLS
METAL-WORKING NOT OTHERWISE PROVIDED FOR
PERFORMING OPERATIONS
SEMICONDUCTOR DEVICES
SOLDERING OR UNSOLDERING
TRANSPORTING
WELDING
WORKING BY LASER BEAM
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Summary:A method for fabricating an orifice in a semiconductor which can include: removing a first depth of the semiconductor using a first material removal technique and removing a second depth of the semiconductor using a second material removal technique. The method can optionally include: adding a sacrificial layer of material and reducing a depth of the semiconductor by a friction-based material removal technique. In examples, the method fabricates a wafer-scale processor with a set of fastening features.
Bibliography:Application Number: US201916593831